GMS81C7216 Datasheet, PDF(22/121 Page) List of Unclassifed Manufacturers

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

GMS81C7216 Datasheet, PDF (22/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

◁

GMS81C7208/7216

PSW

NEGATIVE FLAG

OVERFLOW FLAG

SELECT DIRECT PAGE

when G=1, page is selected to âpage 1â

BRK FLAG

MSB

LSB

N V G B H I Z C RESET VALUE: 00H

CARRY FLAG RECEIVES

CARRY OUT

ZERO FLAG

INTERRUPT ENABLE FLAG

HALF CARRY FLAG RECEIVES

CARRY OUT FROM BIT 3 OF

ADDITION OPERLANDS

Figure 8-3 PSW (Program Status Word) Register

[Interrupt disable flag I]

This flag enables/disables all interrupts except interrupt caused

by Reset or software BRK instruction. All interrupts are disabled

when cleared to â0â. This flag immediately becomes â0â when an

interrupt is served. It is set by the EI instruction and cleared by

the DI instruction.

[Half carry flag H]

After operation, this is set when there is a carry from bit 3 of ALU

or there is no borrow from bit 4 of ALU. This bit can not be set

or cleared except CLRV instruction with Overflow flag (V).

[Break flag B]

This flag is set by software BRK instruction to distinguish BRK

from TCALL instruction with the same vector address.

[Direct page flag G]

This flag assigns RAM page for direct addressing mode. In the di-

rect addressing mode, addressing area is from zero page 00H to

0FFH when this flag is "0". If it is set to "1", addressing area is

assigned by RPR register (address 0F3H). It is set by SETG in-

struction and cleared by CLRG.

RAM Page

0 page

1 page

Reserved

Instruction

CLRG

SETG

Bit1 of

RPR

Bit0 of

RPR

When content of RPR is above 2, malfunction will be occurred.

[Overflow flag V]

This flag is set to â1â when an overflow occurs as the result of an

arithmetic operation involving signs. An overflow occurs when

the result of an addition or subtraction exceeds +127(7FH) or -

128(80H). The CLRV instruction clears the overflow flag. There

is no set instruction. When the BIT instruction is executed, bit 6

of memory is copied to this flag.

[Negative flag N]

This flag is set to match the sign bit (bit 7) status of the result of

a data or arithmetic operation. When the BIT instruction is exe-

cuted, bit 7 of memory is copied to this flag.

FEB. 2005 Ver 1.04

▷