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| GMS81C7216 Datasheet, PDF (15/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS | |||
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GMS81C7208/7216
Parameter
Symbol
Condition
Specifications
Unit
Min.
Typ.
Max.
LCD Voltage Dividing
Resistor
RLCD VDD=5.5V
45
65
85
kâ¦
Voltage Drop
|VDD-COMn| , n=0~3
Voltage Drop
|VDD-SEGn| , n=0~26
VCL2 Output Voltage
VCL1 Output Voltage
VCL0 Output Voltage
VDC
VDS
VCL2
VDD=2.7 ~ 5.5V
-15µA per Common Pin
VDD=2.7 ~ 5.5V
-15µA per Segment Pin
VCL1
VCL0
VDD=2.7 ~ 5.5V, 1/3 Bias
BIAS pin and VCL2 pin are shorted
-
-
120
mV
-
-
120
mV
VDD-0.3
VDD
VDD+0.3
0.66VDD
-0.2
0.66VDD
0.66VDD
+0.3
V
0.33VDD
-0.3
0.33VDD
0.33VDD
+0.3
RC Oscillation Fre-
quency
Supply Current 1
( ) means at 3V opera-
tion
fRC R=60kâ¦, VDD= 5V
IDD1
Main Clock Operation Mode 2
VDD=5.5V±10%, XIN=4MHz
IDD2
Sleep Mode 3
VDD=5.5V±10%, XIN=4MHz
Stop Mode 4
IDD6 VDD=5V±10%, XIN= 0Hz
When the bit7 of LCR register is â1â.
1
2
3
MHz
-
2.9
(1.3)
7.0
(3.0)
mA
-
0.4
(0.1)
1.7
(1.0)
mA
-
1.0
(0.5)
12
(5)
µA
1. Supply current in the following circuits are not included; on-chip pull-up resistors, internal LCD voltage dividing resistors, comparator volt-
age divide resistor, LVD circuit and output port drive currents.
2. This mode set System Clock Mode Register(SCMR) to xxxx0000B that is fXIN/2
3. This mode set SCMR to xxxx0000B (fXIN/2) and set SMR to â1â
4. Main frequency clock stops and set SCMR to xxxx0011B and set SMR to â1â.
** Caution : The bit7(SUBM) of LCR register must be set to â1â by software
because of reduction current consumption (reset value =â0â).
FEB. 2005 Ver 1.04
11
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