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GMS81C7216 Datasheet, PDF (40/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS
GMS81C7208/7216
10. CLOCK GENERATOR
As shown in Figure 10-1, the clock generator produces the basic
clock pulses which provide the system clock to be supplied to the
CPU and the peripheral hardware. It contains an oscillators: a
main-frequency clock oscillator. The system clock can also be
obtained from the external oscillator.
The clock generator produces the system clocks forming clock
pulse, which are supplied to the CPU and the peripheral hard-
ware. The internal system clock can be selected by bit2, and bit3
of the system clock mode register(SCMR).
CPU Clock
÷2
÷8
÷ 16
÷ 64
Instruction Cycle Time
XIN = 4MHz
0.5 us
2.0 us
4.0 us
16.0 us
The register is shown in Figure 10-2.
To the peripheral block, the clock among the not-divided original
clocks, divided by 2, 4,..., up to 1024 can be provided. Peripheral
clock is enabled or disabled by STOP instruction.
SYCC<1>=0 & LCR<7>=1
SYCC<0>
STOP Mode
OSC Stop
XIN PIN
0
Reserved
1
SYCC<1>=1 & LCR<7>=0
SLEEP Mode
fEX
SCS[1:0]
Select clock
÷2
÷8
MUX
÷16
÷64
Internal system clock (CPU clock)
PRESCALER
PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10
÷1 ÷2 ÷4 ÷8 ÷16 ÷32 ÷64 ÷128 ÷256 ÷512 ÷1024
Peripheral clock
fEX(MHz)
PS0 PS1 PS2 PS3 PS4 PS5 PS6 PS7 PS8 PS9 PS10
Frequency 4M
2M
1M
4
period 250n 500n 1u
500K
2u
250K
4u
125K
8u
62.5K 31.25K 15.63K 7.183K 3.906K
16u
32u
64u 128u 256u
Figure 10-1 Block Diagram of Clock Generator
36
FEB. 2005 Ver 1.04