GMS81C7216 Datasheet, PDF (44/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
12. BASIC INTERVAL TIMER
The GMS81C7208/16 has one 8-bit basic interval timer that is
free-run and can not stop. Block diagram is shown in Figure 12-1.
In addition, the basic tnterval timer generates the time base for
watchdog timer counting. It also provides a Basic interval timer
interrupt (BITIF). As the count overflow from FF_H to 00_H, this
overflow causes the interrupt to be generated. The basic interval
timer is controlled by the clock control register (CKCTLR)
shown in Figure 12-2.
Source clock can be selected by lower 3 bits of CKCTLR.
The registers BITR and CKCTLR are located at same address,
and address 0F9_H is read as a BITR, and written to CKCTLR.
SCMR[1:0]
f_XIN
0X
reserved
1X
÷8
÷16
÷32
÷64
÷128
÷256
÷512
÷1024
MUX
source
clock
8-bit up-counter
[0F9_H]
clear
overflow
Select Input clock ³
BTS[2:0]
[0F4_H]
CKCTLR
Basic Interval Timer
clock control register
BTCL
BITR
Read
Internal bus line
BITIF
Basic Interval Timer Interrupt
To Watchdog timer (WDTCK)
Figure 12-1 Block Diagram of Basic Interval Timer
BTS[2:0]
000
001
010
011
100
101
110
111
CPU Source Clock
÷8
÷16
÷32
÷64
÷128
÷256
÷512
÷1024
Interrupt (overflow) Period (ms)
@ f_XIN = 4MHz
0.512
1.024
2.048
4.096
8.192
16.384
32.768
65.536
Table 12-1 Basic Interval Timer Interrupt Time
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FEB. 2005 Ver 1.04