GMS81C7216 Datasheet, PDF (35/121 Pages) List of Unclassifed Manufacturers – 8-BIT SINGLE-CHIP MICROCONTROLLERS

GMS81C7208/7216
9. I/O PORTS
The GMS81C7208/16 has six ports (R0, R2, R3, R4, R5 and R6),
and LCD segment port SEG0~SEG11 and SEG16~SEG20 and
LCD common port COM0~COM3, which are multiplexed with
SEG24~SEG26.
9.1 Port Data Registers
Port Data Registers
The Port Data Registers in I/O buffer in each six ports
(R0,R2,R3,R4,R5,R6) are represented as a Type D flip-flop,
which will clock in a value from the internal bus in response to a
"write to data register" signal from the CPU. The Q output of the
flip-flop is placed on the internal bus in response to a "read data
register" signal from the CPU. The level of the port pin itself is
placed on the internal bus in response to "read data register" sig-
nal from the CPU. Some instructions that read a port activating
the "read register" signal, and others activating the "read pin" sig-
nal
Port Direction Registers
All pins have data direction registers which can define these ports
as output or input. A "1" in the port direction register configure
the corresponding port pin as output. Conversely, write "0" to the
corresponding bit to specify it as input pin. For example, to use
the even numbered bit of R0 as output ports and the odd num-
bered bits as input ports, write “55_H” to address 0C8_H (R0 port
direction register) during initial setting as shown in Figure 9-1.
These ports pins may be multiplexed with an alternate function
for the peripheral features on the device. In general, in a initial re-
set state, R0,R2,R3 ports are used as a general purpose input port
and R4, R5 and R6 ports are used as LCD segment drive output
port.
When a port is used as input, input logic is firmly either low or
high, therefore external pull-down or pull-up resisters are re-
quired practically. The GMS81C7208/16 has internal pull-up, it
can be logic high by pull-up that can be able to configure either
connect or disconnect individually by pull-up control registers
R0PU, R2PU and R3PU.
When ports are configured as inputs and pull-up resistor is select-
ed by software, they are pulled to high.
VDD
VDD
PULL-UP RESISTOR
Typ. 160kΩ
PORT PIN
Pull-up control bit
GND
0: Disconnect
1: Connect
WRITE “55_H” TO PORT R0 DIRECTION REGISTER
0C0H
R0 DATA
0C1H
~~
R1 DATA
~~
0C8H R0 DIRECTION
0C9H R1 DIRECTION
0 1 0 1 0 1 0 1 BIT
76543210
I O I O I O I O PORT
76543210
I : INPUT PORT
O : OUTPUT PORT
Figure 9-2 Pull-up Port Structure
Open Drain Port Registers
The R0, R2 and R3 ports have open drain port resistors
R0CR~R3CR.
Figure 9-3 shows a open drain port configuration by control reg-
ister. It is selected as either push-pull port or open-drain port by
R0CR, R1CR, R2CR and R3CR.
Figure 9-1 Example of Port I/O Assignment
All the port direction registers in the MCU have 0 written to them
by reset function. On the other hand, its initial status is input.
Pull-up Control Registers
The R0, R2 and R3 ports have internal pull-up resistors.
Figure 9-2 shows a functional diagram of a typical pull-up port.
It is connected or disconnected by pull-up control register
(PURn). The value of that resistor is typically 160kΩ.
PORT PIN
Open drain port selection bit
GND
0: Push-pull
1: Open drain
Figure 9-3 Open Drain Port Structure
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