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M12S64164A Datasheet, PDF (44/45 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16 Bit x 4 Banks Synchronous DRAM
ESMT
Revision History
Revision
1.0
1.1
1.2
M12S64164A
Date
2007.08.16
2008.08.28
2009.04.27
Description
Original
1. Add the specification of speed grade -6 and -10
2. Modify tCC(max) from - to 1000 ns for speed grade -7
1. Rename A13, A12 to BA0, BA1
2. Modify the test condition of IIL and ICC3N
3. Modify the description about self refresh operation
4. Modify type error
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2009
Revision: 1.2
44/45