M12S64164A Datasheet, PDF (16/45 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16 Bit x 4 Banks Synchronous DRAM

ESMT
M12S64164A
BASIC FEATURE AND FUNCTION DESCRIPTIONS
1. CLOCK Suspend
1) Cl oc k Su sp end ed D ur in g W ri te ( BL= 4)
CLK
2 ) C lo c k Su s pe nd ed D ur i ng R ead ( BL =4 )
CM D
WR
RD
CK E
I nt e rn al
CL K
DQ (CL2)
Masked by CKE
D0 D1
D2 D3
Q0 Q1
Q2
DQ (C L3)
D0 D1
D2 D3
Q0
Q1
Q3
Q2 Q3
2. DQM Operation
N ot W ri tten
Su spe nd ed D ou t
CLK
1)Write Mask (BL=4)
CMD
WR
DQM
DQ(CL2)
DQ(CL3)
D0 D1
D0 D1
Masked b y DQ M
D3
D3
DQM to Data-in Mask=0
3)DQM with clcok suspended (Full Page Read)
*Note2
CLK
CMD
RD
CKE
Internal
CLK
DQM
DQ(CL2)
DQ(CL3)
Hi - Z
Q0
Q2
Hi-Z
Q1
2)Read Mask (BL=4)
RD
Masked b y DQ M
Hi - Z
Q0
Q2
Q3
Hi - Z
Q1 Q2 Q3
DQM to Data-out Mask=2
Hi-Z
Q4
Hi-Z
Q3
Hi - Z
Hi-Z
Q6 Q7 Q8 Q9
Q5 Q6 Q7 Q8
*Note: 1. CKE to CLK disable/enable = 1CLK.
2. DQM masks data out Hi-Z after 2CLKs which should masked by CKE ”L”.
3. DQM masks both data-in and data-out.
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2009
Revision: 1.2
16/45