MA31750 Datasheet, PDF (13/42 Pages) Dynex Semiconductor – High Performance MIL-STD-1750 Microprocessor

MA31750
MODE
1. Register Direct
"R"
MSB
0
0
2. Memory Direct
INSTRUCTION
FORMAT
LSB
78
11 12
15
OC
RA
RB
MSB
78
11 12
15 16
OC
RA
RX
"D"
"DX"
RX = 0 (Non-indexed)
RX ≠ 0 (Indexed)
POSTWORD
LSB
31
A
0
3. Memory Indirect
78
11 12
15 16
OC
RA
RX
"I"
RX = 0 (Non-indexed)
"IX"
RX ≠ 0 (Indexed)
4. Immediate Long ⁰
a. Not indexable
"IM"
0
b. Indexable
78
11 12
15 16
OC
RA
OCX
78
11 12
15 16
OC
RA
RX
"IM"
"IMX"
RX = 0 (Non-indexed)
RX ≠ 0 (Indexed)
5. Immediate Short ⁰
a. Positive
"ISP"
0
b. Negative
"ISN"
78
11 12
15
OC
RA
I
78
11 12
15
OC
RA
I
31
A
31
I
31
I
0
78
15
6. IC Relative
OC
"ICR"
D
0
56 78
15
7. Base Relative
a. Not Indexable
OC
BR'
DU
"B"
BR' = BR - 12
0
56 78
11 12
15
b. Indexable
OC
BR'
OCX
RX
"B"
"BX"
RX = 0 (Non-indexed)
RX ≠ 0 (Indexed)
0
8. Special
"S"
78
11 12
15
OC
S1
S2
Legend
OC
RA
RB
RX
A
OCX
I
D
BR'
DU
S1, S2
= Operation Code
= Destination Register
= Source Register
= Index Register
= Address (logical)
= Extension to Operation Code
= Immediate Data
= Displacement
= Base Register Reference
= Displacement (positive)
= Special Code
Figure 18: Addressing Modes
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