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| MA31750 Datasheet, PDF (12/42 Pages) Dynex Semiconductor – High Performance MIL-STD-1750 Microprocessor | |||
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MA31750
Byte
MSB LSB MSB LSB
Upper byte Lower byte
0
15
Single Precision Fixed-Point
MSB
LSB
Value
0
15
Unsigned Single Precision Fixed-Point (1750B)
MSB
LSB
Unsigned value
0
15
Double-Precision Fixed-Point
MSB
Value
0
LSB
31
Unsigned Double Precision Fixed-Point (1750B)
MSB
Unsigned value
LSB
0
31
Note: All values are
Signed 2s complement
unless shown as
unsigned.
Floating Point
MSB
Mantissa
0
LSB MSB LSB
Exponent
23 24
31
Extended Precision Floating Point
MSB
Mantissa (Most significant)
0
LSB MSB LSB MSB
LSB
Exponent
Mantissa (Least Sig.)
23 24
31 32
47
Figure 16: Data Formats
Mode
R
D, DX
I, IX
IM, IMX
ISP
ISN
ICR
B
BX
S
Name
Register Direct
Memory Direct
Memory Indirect
Immediate Long
Immediate Short Positive
Immediate Short Negative
Instruction Counter
Relative
Base Relative
Base Relative Indexed
Special
Derived Operand
The operand is contained in a regular specified by the instruction.
The instruction postword (plus RX if RX â 0), contains the memory address of the
operand.
The instruction postword (plus RX if RX â 0) contains the address of the address
which holds the operand.
The instruction postword (plus RX if RX â 0) holds the operand.
The operand value is specified as part of the instruction. (ISP specifies values
between 0001H and 0010H, ISN specifies values between FFFFH and FFEFH).
The operand value is specified as part of the instruction. (ISP specifies values
between 0001n and 0010n, ISN specifies values between FFFFn and FFEFn).
A 2s-complement, 8-bit displacement which is sign-extended and added to the
Instruction counter to provide an offset of -128 to +127.
Data at address given by: contents of specified base register (R12-R15, specified
by opcode), plus unsigned 8-bit displacement field from opcode.
Data at address given by contents of specified base register (R12-R15, specified
by opcode), plus contents of RX register if RX â R0
See instruction for details.
Figure 17: Address Mode Summary
12/42
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