IBIS4-A-6600 Datasheet, PDF (10/40 Pages) Cypress Semiconductor – 6.6 MP CMOS Image Sensor

ADVANCE
INFORMATION
IBIS4-A-6600
CYII4SM6600AB
Pixel
Architecture
The pixel architecture is the classical three-transistor pixel as
shown in 3T Pixel Architecture on page 10 The pixel has been
implemented using the high fill factor technique as patented by
FillFactory (US patent No. 6,225,670 and others).
Figure 4. 3T Pixel Architecture
Vdd
on chip. Measurements indicate that the typical PRNU is about
1.5% RMS of the signal level.
Color filter array
The IBIS4-6600 can also be processed with a Bayer RGB
color pattern. Pixel (0,0) has a green filter and is situated on a
green-red row. Green1 and green2 are separately processed
color filters and have a different spectral response. Green1
pixels are located on a blue-green row, green2 pixels are
located on a green-red row.
Figure 5. RGB Bayer Alignment
reset
M1
selec
M2
M3
output
(column)
FPN and PRNU
Fixed Pattern Noise correction is done on-chip. Raw images
taken by the sensor typically feature a residual (local) FPN of
0.35% RMS of the saturation voltage.
The Photo Response Non Uniformity (PRNU), caused by
mismatch of photodiode node capacitances, is not corrected
Typical Response Curve of the RGB Filters on page 10 below
shows the response of the color filter array as function of the
wavelength. Note that this response curve includes the optical
cross talk and the NIR filter of the color glass lid as well (see
Figure 6. Typical Response Curve of the RGB Filters
Document Number: 001-02366 Rev. *D
Page 10 of 40
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