STC5428 Datasheet, PDF (29/66 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

STC5428
Synchronous Clock for SETS
DATASHEET
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₃
1MHz ~ 156.25MHz
Synthesizer G_T4
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₄
1MHz ~ 156.25MHz
Synthesizer G_T4
CLK3 Generator
Frame
Mux
CLK3
Sel
LVCMOS
DRIVER
CLK4 Generator
Frame
Mux
CLK4
Sel
LVCMOS
DRIVER
CLK3
CLK4
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₅
1MHz ~ 156.25MHz
Synthesizer G_T4
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₆
1MHz ~ 156.25MHz
Synthesizer G_T4
CLK5 Generator
Frame
Mux
CLK5
Sel
LVCMOS
DRIVER
CLK6 Generator
Frame
Mux
CLK6
Sel
LVCMOS
DRIVER
CLK5
CLK6
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₇
1MHz ~ 156.25MHz
Synthesizer G_T4
Synth
F
Frame8K
Frame2K
Composite
Synthesizer G₈
1MHz ~ 156.25MHz
Synthesizer G_T4
CLK7 Generator
Frame
Mux
CLK7
Sel
LVCMOS
DRIVER
CLK8 Generator
Frame
Mux
CLK8
Sel
LVCMOS
DRIVER
CLK7
CLK8
Figure 6:Output Clocks CLK3~CLK8
Synthesizer F
Frame8K
Duty Cycle
Control
Frame2K
Duty Cycle
Control
CLK8K Generator
LVCMOS
Driver
CLK2K Generator
LVCMOS
Driver
CLK8K
8kHz frame pulse
CLK2K
2kHz frame pulse
Figure 7:Output Clocks CLK8K and CLK2K
Clock Outputs
CLK1 or CLK2 is selected when associated synthe-
sizer G₁ or G₂ is selected at the register CLK1 Sel or
CLK2 Sel. Output frequencies or phase skew of
CLK1 and CLK2 are programmable when frequency
or skew of the associated synthesizer is programmed
at the register Synth Index Select, Synth Freq
Value, and Synth SFkuenwctAiodnj. aOl uStppuetcfirfeiqcuaetniocynis
programmable from 1MHz to 156.25MHz, in 1kHz
steps.
CLK3~CLK8 is selected when associated synthesizer
G₃~G₈, or G_T4 is selected at the register CLK(3~8)
Sel. Output frequencies or phase skew of
CLK3~CLK8 are programmable when frequency or
skew of the associated synthesizer is programmed at
the register Synth Index Select, Synth Freq Value,
and Synth Skew Adj. Output frequency of
CLK3~CLK8 is programmable from 1MHz to
156.25MHz, in 1kHz steps, via either synthesizer
G₃~G₈ or G_T4 individually. CLK3~CLK8 can also out-
put frame pulse clocks when synthesizer F is selected
at the register CLK(3~8) Sel. One of frame pulse
clock of Frame8K, Frame2K, or proprietary composite
signal is selected at the register Frame Mux for
CLK3~CLK8 individually. Phase skew of frame pulse
clocks is programmable simultaneously at the register
Synth Index Select and Synth Skew Adj.
Redundant Application
Timing generator T0 supports master/slave and multi-
ple master operation for redundant applications to
allow system protection against single part failure.
External Frame Reference Input
For redundant design, either in master/slave mode or
multiple master mode, all the timing devices should
keep in frame phase alignment. In order to achieve
the alignment, the frame edge of reference input is
required. If the reference input is not proprietary com-
posite signal or 8kHz input signal which contains its
own frame information, an external frame reference
input (at pin EX_SYNC) is used and some configura-
tion enhancements are required. See register Slave
Frame Align for slave mode configuration. See regis-
ter Master Frame Align for master mode configura-
tion.
Master Slave Configuration
Pairs of STC5428 devices may be operated in a mas-
ter/slave configuration. There are two ways to select
master or slave mode for each T0 timing generator of
two devices. The register Master Slave Selection
Mode determines which of two ways is used:
1. Hardware select using pin MC/SL. Pin state can be
read from the register T0 MS Sts.
2. Register select using the register T0 MS Sts. Write
Page 29 of 66
Preliminary
Rev: 0.2
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: April 3, 2014