AK7755EN_16 Datasheet, PDF (79/109 Pages) Asahi Kasei Microsystems – DSP with Mono ADC Stereo CODEC + Mic/Lineout Amp

[AK7755]
■ I²C Bus Interface (I2CSEL pin= “H”)
Access to the AK7755 registers and RAM is controlled by an I²C bus. The AK7755 supports fast-mode
I²C-bus (max: 400kHz) only.
1. Data Transfer
In order to access any IC devices on the I²C bus, input a start condition first, followed by a single Slave
address which includes the Devices Address. IC devices on the BUS compare this Slave address with
their own addresses and the IC device which has an identical address with the Slave address generates an
acknowledgement. An IC device with the identical address then executes either a read or a write
operation. After the command execution, input a Stop condition.
1-1. Data Change
Change the data on the SDA line while the SCL line is “L”. The SDA line condition must be stable
and fixed while the clock is “H”. Change the Data line condition between “H” and “L” only when the
clock signal on the SCL line is “L”. Change the SDA line condition while the SCL line is “H” only
when the start condition or stop condition is input.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 62. Data Change (I²C)
1-2. Start Condition and Stop Condition
A start condition is generated by the transition of “H” to “L” on the SDA line while the SCL line is
“H”. All instructions are initiated by a Start condition. A stop condition is generated by the transition
of “L” to “H” on the SDA line while the SCL line is “H”. All instructions end by a Stop condition.
SCL
SDA
START CONDITION
STOP CONDITION
Figure 63. Start Condition and Stop Condition (I²C)
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