AK7755EN_16 Datasheet, PDF (53/109 Pages) Asahi Kasei Microsystems – DSP with Mono ADC Stereo CODEC + Mic/Lineout Amp

[AK7755]
TVDD, AVDD
DVDD
PDN(Pin)
SI(spi), SDA(i2c)
CKRESETN bit (Reg.)
DSPRESETN bit(Reg)
CRESETN bit(Reg)
XTI,BICK(Pin)
Internal PLLCLK
(Internal Master Clock)
DLRDY=1
DSP Program
DLRDY=0 CONT Reg.Setting
Clock Stabilization
Before PLL stable oscillation
Power OFF
600ns(min) 1ms(min) 1ms(min)
access is not permitted
(10ms)
Figure 25. Power-up Sequence 2
(With External Power Supply (LDOE pin = “L”), DLRDY Setting, No downloading from EEPROM)
2. When downloading settings and programs from EEPROM
When downloading programs from an EEPROM, I²C interface (I2CSEL pin = “H”) and a 12.288MHz
clock input to the XTI pin are necessary, or a 12.288MHz crystal oscillator must be connected to the XTI
and XTO pins. In this case, only CKM mode 0 and 2 (CONT00: D6-D4) are available. The AK7755 should
be powered up when the PDN pin = “L”. AVDD and TVDD must be powered up first before DVDD when
DVDD is supplied externally (LDOE pin = “L”). In this case, the power-up sequence between AVDD and
TVDD is not critical. Set the PDN pin to “H” to start the power supply circuits for REF (analog reference
voltage source) generator and internal digital circuit (only when the LDOE pin = “H”) after all power
supplies are fed. There are three ways to start downloading control register settings, DSP programs and
Coefficient RAM: by PDN pin (1) (Figure 26), by EXTEEP pin (2) (Figure 26) and by DLS bit (3) (Figure
27).
014006643-E-00
- 53 -
2014/10