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AK7755EN_16 Datasheet, PDF (50/109 Pages) Asahi Kasei Microsystems – DSP with Mono ADC Stereo CODEC + Mic/Lineout Amp | |||
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[AK7755]
CONT1B: Microphone Gain Read Register when using ADRC
W R Name D7
D6
D5
D4
D3
D2
D1
D0
Default
-
5Bh
CONT1B
AMGNR
[3]
AMGNR
[2]
AMGNR
[1]
AMGNR
[0]
AMGNL
[3]
AMGNL
[2]
AMGNL
[1]
AMGNL
[0]
00h
This register is a read only register.
AMGNR[3:0] bits will be valid when ADRCRE bit (CONT1A: D3) = â1â, and AMGNL[3:0] will be valid
when ADRCLE bit (CONT1A: D2) = â1â. The microphone gain value set by DSP can be readout.
CONT1C: TEST Setting
W R Name D7 D6 D5 D4 D3 D2 D1 D0 Default
DCh 5Ch CONT1C 0 0 0 0 0 0 0 0 00h
Write â0â into the â0â registers.
CONT1D: ADC2 Rch Digital Volume Setting
W R Name D7
D6
D5
D4
D3
D2
D1
D0
Default
DDh
5Dh CONT1D
VOL
AD2R[7]
VOL
AD2R[6]
VOL
AD2R[5]
VOL
AD2R[4]
VOL
AD2R[3]
VOL
AD2R[2]
VOL
AD2R[1]
VOL
AD2R[0]
30h
Refer to â2-3. ADC2 Digital Volumeâ.
CONT1E: Digital Microphone Interface Setting
W R Name D7
D6
D5
D4
D3
D2
D1 D0 Default
DDh 5Dh CONT1D DMIC1 DMCLKP1 DMCLKE1 DMIC2 DMCLKP2 DMCLKE2 0 0 00h
D7: DMIC1 Digital Microphone 1 Select
0: Not Using DMIC1 (default)
1: Using DMIC1
When DMIC1 bit = â1â or DMIC2 bit = â1â, pin number 31~ 34 become digital microphone interfaces,
and analog inputs are not available.
D6: DMCLKP1 Digital Microphone 1 Channel Setting
DMCLKP1 DMCLK1 pin = âHâ DMCLK1 pin = âLâ
0
Rch
Lch
1
Lch
Rch
(default)
D5: DMCLKE1 Digital Microphone 1 Clock Setting
0: DMCLK1 pin = âLâ (default)
1: DMCLK1 64fs (Output Enable)
ã»D4: DMIC2 Digital Microphone 2 Select
0: Not Using DMIC2 (default)
1: Using DMIC2
When DMIC1 bit = â1â or DMIC2 bit = â1â, pin number 31 ~ 34 become digital microphone
interfaces, and analog inputs are not available.
ã»D3: DMCLKP2 Digital Microphone 2 Channel Setting
DMCLKP2
DMCLK2 pin = âHâ
DMCLK2 pin = âLâ
0
Rch
Lch
1
Lch
Rch
ã»D2: DMCLKE2 Digital Microphone 2 Clock Setting
0: DMCLK2 pin = âLâ (default)
1: DMCLK1 64fs (Output Enable)
(default)
014006643-E-00
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2014/10
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