AK7755EN_16 Datasheet, PDF (71/109 Pages) Asahi Kasei Microsystems – DSP with Mono ADC Stereo CODEC + Mic/Lineout Amp

[AK7755]
3. Offset REG (OFREG) Write (during system reset)
Field
Write data
(1) COMMAND Code 0xB2
(2) ADDRESS1
00000000
(3) ADDRESS2
0 0 A5 A4 A3 A2 A1 A0
(4) DATA1
00000000
(5) DATA2
0 0 0 D12 D11 D10 D9 D8
(6) DATA3
D7~D0
Three bytes of data may be written continuously for each address.
4. Accelerator Coefficient RAM (ACRAM) Write (during system reset)
Field
Write data
(1) COMMAND Code 0xBB
(2) ADDRESS1
0 0 0 0 0 A10 A9 A8
(3) ADDRESS2
A7 A6 A5 A4 A3 A2 A1 A0
(4) DATA1
D19~D12
(5) DATA2
D11~D4
(6) DATA3
D3~D0 0 0 0 0
Three bytes of data may be written continuously for each address.
6-2. Write Operation during System Reset / RUN
1. Control Register Write (during system reset / RUN)
Field
Write data
(1) COMMAND Code 0xC0~0xDF, 0xE6, 0xEA
(2) DATA
D7~D0
2. External Conditional Jump Code Write (during system reset / RUN)
Field
Write data
(1) COMMAND Code 0xF4
(2) DATA
D7~D0
3. CRC Code Write (during system reset / RUN)
Field
Write data
(1) COMMAND Code 0xF2
(2) DATA
D15~D8
(3) DATA
D7~D0
6-3. Write Operation during RUN
1. Coefficient RAM (CRAM) Write Preparation (during RUN)
Preparation
Write data
(1) COMMAND Code 0x80~0x8F (one data at 80h, sixteen data at 8Fh)
(2) ADDRESS1
0 0 0 0 0 A10 A9 A8
(3) ADDRESS2
A7 ~ A0
(4) DATA1
D23~D16
(5) DATA2
D15~D8
(6) DATA3
D7~D0
014006643-E-00
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2014/10