AK7755EN_16 Datasheet, PDF (68/109 Pages) Asahi Kasei Microsystems – DSP with Mono ADC Stereo CODEC + Mic/Lineout Amp

[AK7755]
4. Data
The length of write data depends on the write area size. When accessing RAM, data may be written to
sequential address locations by writing data continuously.
Write
Command Address Data Length Description
Write preparation to CRAM during RUN.
Command code BIT3~BIT0 bits determines the amount of write
0x80~0x8F 16bit 24bit×n
operation. (0x80 # of write: 1, 0x81 # of write: 2, ----, 0x8F # of
write: 16) If the actual amount of write operations exceeds the
defined amount, that data will be ignored.
Write preparation to OFREG during RUN
Command code BIT3~BIT0 bits determines the amount of write
0x90~0x9F 16bit 24bit×n
operation. (0x90 # of write: 1, 0x91 # of write: 2, ----, 0x9F # of
write: 16) If the actual amount of write operations exceeds the
defined amount, that data will be ignored.
0xA2
16bit None
Write operation to OFREG during RUN. 0 address should be
written.
0xA4
16bit None
Write operation to CRAM during RUN. 0 address should be written.
0xB2
16bit 24bit×n
Write operation to OFREG during system reset
0xB4
16bit 24bit×n
Write operation to CRAM during system reset
0xB8
16bit 40bit×n
Write operation to PRAM during system reset
0xBB
16bit 24bit×n
Write operation to ACRAM during system reset
0xC0~0xDF None 8bit
Write operation to Control Registers 00~1Fh
0xE6
None 8bit
Write operation to Control Register 26h
0xEA
None 8bit
Write operation to Control Register 2Ah
0xF2
None 16bit
CRC Write
0xF4
None 8bit
Write operation of External Conditional Jump Code
Data length is defined by the command code which specifies the area to be accessed. When accessing
RAM, data may be read from sequential address locations by reading data continuously. Writing other
than this command code is prohibited.
014006643-E-00
- 68 -
2014/10