AK5700 Datasheet, PDF (47/61 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono ADC with PLL & MIC-AMP

ASAHI KASEI
[AK5700]
μP
19 MPWR
EXLRCK 12
DSP
20 TEST
21 AIN2
EXSDTI 11
AK5700VN MCKO 10
Line In
22 AINʵ
Top View
CSP 9
23 AIN1
SDTO 8
DSP
0.1 x Cp
(Note)
24 VCOC
Rp
Cp
LRCK 7
Power Supply
2.4 ∼ 3.6V
Power Supply
1.6 ∼ 3.6V
Analog Ground
Digital Ground
Notes:
- AVSS and DVSS of the AK5700 should be distributed separately from the ground of external controllers.
- All digital input pins should not be left floating.
- When the AK5700 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of VCOC pin is not needed.
- When the AK5700 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of VCOC pin is shown in Table 4.
0.1 x Cp in parallel with Cp+Rp improves PLL jitter characteristics.
Figure 40. Typical Connection Diagram (Line Input)
MS0569-E-01
- 47 -
2006/12