AK5700 Datasheet, PDF (11/61 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono ADC with PLL & MIC-AMP

ASAHI KASEI
[AK5700]
Parameter
Control Interface Timing (CSP pin = “L”)
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
Control Interface Timing (CSP pin = “H”)
CCLK Period
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “L” Time
CSN “↑” to CCLK “↑”
CCLK “↑” to CSN “↓”
Power-down & Reset Timing
PDN Pulse Width (Note 20)
PMADC “↑” to SDTO valid (Note 21)
HPF1-0 bits = “00”
HPF1-0 bits = “01”
HPF1-0 bits = “10”
Symbol
min
tCCK
142
tCCKL
56
tCCKH
56
tCDS
28
tCDH
28
tCSW
150
tCSS
50
tCSH
50
tCCK
142
tCCKL
56
tCCKH
56
tCDS
28
tCDH
28
tCSW
150
tCSS
50
tCSH
50
tPD
150
tPDV
-
tPDV
-
tPDV
-
Note 20. The AK5700 can be reset by the PDN pin = “L”.
Note 21. This is the count of LRCK “↑” from the PMADC bit = “1”.
typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
3088
1552
784
max
Units
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
1/fs
-
1/fs
-
1/fs
MS0569-E-01
- 11 -
2006/12