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AK5700 Datasheet, PDF (22/61 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Mono ADC with PLL & MIC-AMP
ASAHI KASEI
[AK5700]
„ PLL Mode
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) generates a clock that is selected by the
PLL3-0 and FS3-0 bits. The PLL lock time is shown in Table 4, whenever the AK5700 is supplied to a stable clocks after
PLL is powered-up (PMPLL bit = “0” → “1”) or sampling frequency changes.
1) Setting of PLL Mode
R and C of
Mode
PLL3 PLL2 PLL1 PLL0 PLL Reference
bit Bit bit bit Clock Input Pin
Input Frequency
VCOC pin
R[Ω] C[F]
PLL
Lock
Time
(max)
0
0
0
0
0 EXLRCK pin
1fs
6.8k 220n 80ms
2
0
0
1
0 EXBCLK pin
32fs
10k 4.7n 2ms
10k 10n 4ms
3
0
0
1
1 EXBCLK pin
64fs
10k 4.7n 2ms
10k 10n 4ms
4
0
1
0
0
MCKI pin
11.2896MHz 10k 4.7n 40ms
5
0
1
0
1
MCKI pin
12.288MHz 10k 4.7n 40ms
6
0
1
1
0
MCKI pin
12MHz
10k 4.7n 40ms
7
0
1
1
1
MCKI pin
24MHz
10k 4.7n 40ms
8
1
0
0
0
MCKI pin
19.2MHz
10k 4.7n 40ms
9
1
0
0
1
MCKI pin 12MHz (Note24) 10k 4.7n 40ms Default
12
1
1
0
0
MCKI pin
13.5MHz
10k 10n 40ms
13
1
1
0
1
MCKI pin
27MHz
10k 10n 40ms
14
1
1
1
0
MCKI pin
13MHz
10k 220n 60ms
15
1
1
1
1
MCKI pin
26MHz
10k 220n 60ms
Others
Others
N/A
Note 24. See Table 5 regarding the difference between PLL3-0 bits = “0110”(Mode 6) and “1001”(Mode 9).
Clock jitter is lower in Mode9 than Mode6 respectively.
Table 4. Setting of PLL Mode (*fs: Sampling Frequency)
2) Setting of sampling frequency in PLL Mode
When PLL reference clock input is MCKI pin, the sampling frequency is selected by FS3-0 bits as defined in Table 5.
Mode
FS3 bit
FS2 bit
FS1 bit
FS0 bit
Sampling Frequency
0
0
0
0
0
8kHz
1
0
0
0
1
12kHz
2
0
0
1
0
16kHz
3
0
0
1
1
24kHz
4
0
1
0
0
7.35kHz
7.349918kHz (Note25)
5
0
1
0
1
11.025kHz
11.024877kHz (Note25)
6
0
1
1
0
14.7kHz
14.69984kHz (Note25)
7
0
1
1
1
22.05kHz
22.04975kHz (Note25)
10
1
0
1
0
32kHz
11
1
0
1
1
48kHz
14
1
1
1
0
29.4kHz
29.39967kHz (Note25)
15
1
1
1
1
44.1kHz
44.0995kHz (Note25)
Default
Others
Others
N/A
Note 25. In case of PLL3-0 bits = “1001”
Table 5. Setting of Sampling Frequency at PMPLL bit = “1” and Reference Clock=MCKI pin
MS0569-E-01
- 22 -
2006/12