HMC703LP4E Datasheet, PDF (48/58 Pages) Hittite Microwave Corporation – 8 GHZ FRACTIONAL SYNTHESIZER

v02.0813
HMC703LP4E
8 GHz fractional synthesizer
Table 20. Reg 07h Lock Detect Register
BIT
TYPE
NAME
W DEFLT
[2:0]
R/W
LKDCounts
3
5
[10:3]
R/W
Reserved
8
12d
[11]
R/W
LockDetect Counters Enable
1
1
[13:12]
R/W
Reserved
2
0
[14]
R/W
Lock Detect Timer Enable
1
1
[15]
R/W
Cycle Slip Prevention Enable 1
0
[19:16]
R/W
Reserved 0
4
0
[20]
R/W
Train Lock Detect Timer
1
0
[21]
R/W
Reserved
1
0
DESCRIPTION
Lock Detect window
sets the number of consecutive counts of divided VCO that must
land inside the Lock Detect Window to declare LOCK
0: 5
1: 32
2: 96
3: 256
4: 512
5: 2048
6: 8192
7: 65535
Program 12d
Enable Lock Detect Counters (R07[14] should also = 1)
Program 0
Enable Lock Detect Timer (R07[11] should also = 1)
Increases Charge Pump gain for phase errors larger than lock-
detect timer.
Reserved
This bit must be programmed from 0 to 1 after a change of PD
reference clock frequency (via either the external reference or a
change to the Rdivider).
Reserved - Program to 1
Table 21. Reg 08h Analog EN Register
BIT
TYPE
NAME
W
[0]
R/W
EnBias
1
[1]
R/W
EnCP
1
[2]
R/W
EnPFD
1
[3]
R/W
EnXtal
1
[4]
R/W
EnVCO
1
[5]
R/W
EnGPO
1
[6]
R/W
EnMcnt
1
[7]
R/W
EnPS
1
[8]
R/W
EnVCOBias
1
[9]
R/W
EnOpAmp
1
[12:10]
R/W
VCOOutBiasA
3
[15:13]
R/W
VCOOutBiasB
3
[16]
R/W
VCOBWSel
1
[17]
R/W
RFDiv2Sel
1
[18]
R/W
XtalLowGain
1
[19]
R/W
XtalDisSat
1
DEFLT
1
1
1
1
1
1
1
1
1
1
3
3
1
0
0
0
DESCRIPTION
Bias
Charge-Pump
PFD
Reference Buffer
VCO Buffer
GPO Output Buffer Enable (If 0 the buffer is HiZ, if 1 the buffer MAY
be HiZ depending on GPOSel and SPI activity)
Mcounter
Prescaler
VCO Divider Related Biases
Charge-Pump Amplifier
RF Divider Bias A Sel
RF Divider Bias B Sel
RF Buffer Bias Sel
Enables RF Divide/2
Lowers the gain (and extends BW) of the XTAL buffer
Disables saturation protection on the XTAL buffer
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