HMC703LP4E Datasheet, PDF (27/58 Pages) Hittite Microwave Corporation – 8 GHZ FRACTIONAL SYNTHESIZER

v02.0813
HMC703LP4E
8 GHz fractional synthesizer
1-Way Sweeps
The HMC703LP4E can be configured to operate in Triggered 1-Way Sweep mode by programming Reg 06h [7:5] =
6. Triggered 1-way sweeps are shown in Figure 33. Unlike 2-Way sweeps, Triggered 1-Way sweeps force the VCO to
hop back to the start frequency upon the next trigger. Triggered 1-Way sweeps also require a 3^rd trigger to start the
new sweep. The 3^rd trigger should be timed appropriately to allow the VCO to settle after the large frequency hop back
to the start frequency. Subsequent odd numbered triggers will start the 1-Way sweep and repeat the process. 1-way
sweep can be triggered by external TRIG pin-6 if EXTTRIG_EN = 1, or the SPI_TRIG (Reg 0Eh).
Figure 33. 1-Way Sweep Control
Single Step Ramp Mode
With any of the sweeper profiles, the HMC703LP4E can be configured to operate in single step mode. This causes
it to wait for an explicit trigger before every change in the frequency setpoint. A Single Step 1-Way Ramp is shown in
Figure 34. In this mode, a trigger is required for each step of the ramp. Similar to autosweep, the ramp_busy flag will
go high on the first trigger, and will stay high until the n^th trigger. The n+1 trigger will cause the ramp to jump to the start
frequency in 1-way ramp mode. The n+2 trigger will restart the 1-way ramp. Single step ramp mode can be triggered
by external TRIG pin-6 if EXTTRIG_EN = 1, or the SPI_TRIG (Reg 0Eh).
In single-step mode (Reg 06h[23] = 1), the HMC703LP4E has the capability to generate arbitrarily shaped profiles
defined by the timing density of the trigger pulses. On each trigger event the frequency is stepped by the step value
programmed in Reg 0Ah. In addition, the HMC703LP4E allows the flexibility to change the step size (Reg 0Ah) during
the ramp, between steps, adding another degree of freedom to ramp profile generation. Note that the maximum trigger
rate where operation can be guaranteed is f_PD/5. In addition, the step register (Reg 0Ah) should not be updated via
the SPI during the first two reference clock cycles after the trigger. The discrete nature of the frequency updates is
smoothed by the loop filter, and should not pose a problem provided that update rate is > 10 x the loop bandwidth.
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