HMC703LP4E Datasheet, PDF (14/58 Pages) Hittite Microwave Corporation – 8 GHZ FRACTIONAL SYNTHESIZER

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HMC703LP4E
8 GHz fractional synthesizer
Theory Of Operation
PLL Basics
In its most trivial form, a synthesizer IC, such as the HMC703LP4E forms the heart of the control loop to multiply a
low frequency reference source up to a higher frequency. The phase detector (PD) and charge-pump (CP) drive the
tuning signal of a voltage-controlled oscillator in an attempt to bring the phases, at the phase-detector input, into
alignment. If the loop can manage this, it means that the phase detector inputs (reference and DIV) must also be at
the same frequency. Since the frequency of the DIV signal = fvco / N, this means the control loop must have forced
the frequency of the VCO output must be locked to N x fpd.
Figure 26. Typical PLL
In integer synthesizers, N can only take on discrete values (eg. 200, 201, etc.). In fractional synthesizers, such as the
HMC703LP4E and others, N can also take on fractional levels, eg. N=20.4. In theory, the fractional divider normally
permits higher phase-detector frequencies for a given output frequency, with associated improvements in signal
quality (phase-noise). Unfortunately, fractional synthesizers suffer from imperfections which do not effect integer
synthesizers. These problems can effect the phase noise, but more seriously they tend to manifest as spurious
emissions - and these spurs are the most serious drawback of fractional synthesis.
Hittite’s fractional synthesizer family (including the HMC703LP4E) offer drastic performance advantages over other
fractional synthesizers in the industry.
The HMC703LP4E synthesizer consists of the following functional blocks:
1. Reference Path Input Buffer and ’R’ Divider
2. VCO Path Input Buffer, RF Divide-by-2 and Multi-Modulus ’N’ Divider
3. Δ � Fractional Modulator
4. Phase Detector
5. Charge Pump
6. Main Serial Port
7. Lock Detect and Register Control
8. Power On Reset Circuit
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