Z8018010VSG Datasheet, PDF (67/85 Pages) Zilog, Inc. – Microprocessor Unit

Z80180
Microprocessor Unit
61
IAR MS Byte Register (IARIB: I/O Address 2Dh)
Bit 7
6
5
A/T A/T
F
C
4
3
2
1
0
T_OUT
DREQ
Req 1 Sel
Figure 61. IAR MS Byte Register (IARIB: I/O Address 2Dh
DMA I/O Address Register Channel 1L
Mnemonic IAR1L (Address 2B)
DMA I/O Address Register Channel 1L
76 54 32 1 0
—— —— — — — —
DMA I/O Channel 1L Address
Figure 62. DMA I/O Address Register Channel 1L
DMA I/O Address Register Channel 1H
Mnemonic IAR1H (Address 2C)
DMA I/O Address Register Channel 1H
76 54 32 1 0
—— —— — — — —
DMA I/O Address Channel 1H
Figure 63. DMA I/O Address Register Channel 1H
PS014004-1106
Architecture