Z8018010VSG Datasheet, PDF (33/85 Pages) Zilog, Inc. – Microprocessor Unit

Z80180
Microprocessor Unit
27
Table 8. Z80180-8 AC Characteristics (continued)
No Symbol Item
58 t_SRSI CSIO Receive Data Set-up Time (Internal Clock
Operation)
59 t_SRHI CSIO Receive Data Hold Time (Internal Clock
Operation)
60 t_SRSE CSIO Receive Data Set-up Time (External Clock
Operation)
61 t_SRHE CSIO Receive Data Hold Time (External Clock
Operation)
62 t_RES
63 t_REH
64 t_OSC
65 t_EXr
66 t_EXf
67 t_Rr
68 t_Rf
69 t_Ir
70 t_If
RESET Set-up Time to Ø Fall
RESET Hold Time from Ø Fall
Oscillator Stabilization Time
External Clock Rise Time (EXTAL)
External Clock Fall Time (EXTAL)
RESET Rise Time
RESET Fall Time
Input Rise Time (except EXTAL, RESET)
Input Fall Time (except EXTAL, RESET)
Z80180-8
Min Max Unit
1
–
tcyc
1
–
tcyc
1
–
tcyc
1
–
tcyc
100 –
ns
70 –
ns
–
20 ns
–
25 ns
–
25 ns
–
50 ns
–
50 ns
–
100 ns
–
100 ns
Table 9. Z80180-10 AC Characteristics
No Symbol Item
1 t_cyc
Clock Cycle Time
2 t_CHW Clock H Pulse Width
3 t_CLW Clock L Pulse Width
4 t_cf
Clock Fall Time
5 t_cr
Clock Rise Time
6 t_AD
ØRise to Address Valid Delay
7 t_AS
Address Valid to MREQ Fall or IORQ Fall)
Z80180-10
Min Max Unit
100 2000 ns
40 –
ns
40 –
ns
–
10 ns
–
10 ns
–
70 ns
10 –
ns
PS014004-1106
Architecture