DS730 Datasheet, PDF (9/46 Pages) Xilinx, Inc – LogiCORE IP Video Direct

LogiCORE IP Video Direct Memory Access v1.1
Table 1: Video DMA pCore Memory Mapped Register Set (Cont’d)
Address (hex)
Register Name
Access Type
Description
12:15
Read Pointer Number
The source pointer to use for Read
Gen-Lock frame pointer
comparisons. Used only when the
“Read Number of Masters”
parameter is > 1.
Write Pointer Number
The source pointer to use for Write
8:12
Gen-Lock frame pointer
comparisons. Used only when the
“Write Number of Masters”
parameter is > 1.
Frame Count Enable
1 = Based on value in Frame Count
7
register, only enable transfers for
this number of frames. The VDMA
will halt when the frame count is
reached.
5:6
Reserved
Horizontal Cropping Enable
1 = Allow Non-Aligned Memory
4
transfers as well as horizontal
lengths that are not 128-byte
multiples.
Sync_Enable
When Circular Buffer Enable = 1,
and when 1, compare current
3
frame store address pointer to
incoming frame store address
pointer. When 0, the slave VDMA
will not be synchronized to the
master VDMA.
Circular Buffer Enable
2
0 = Use Start Address specified in
Read/Write Frame Store Pointer.
1 = Rotate Start Addresses.
VDMA Read Enable
Enable/Start Internal VDMA Read
Transaction(s).
1
This enables generating internal
VDMA read command words.
Read Command words can still be
written into the VDMA if this bit is
zero.
VDMA Write Enable
Enable/Start Internal VDMA Write
Transaction(s).
0
This enables generating internal
VDMA write command words.
Write Command words can still be
written into the VDMA if this bit is
zero.
DS730 September 21, 2010
www.xilinx.com
9
Product Specification