DS730 Datasheet, PDF (22/46 Pages) Xilinx, Inc – LogiCORE IP Video Direct

LogiCORE IP Video Direct Memory Access v1.1
Table 4: Streaming Video Signals (Cont’d)
Name
Direction
Description
vdma_rcmd_almost_full
Out
VDMA Read Command Almost Full
vdma_rcmd_idle
Out
VDMA Read Command Idle
vdma_rd_clk
In
VDMA Read Data Clock
vdma_rd_reset
In
VDMA Read Data Reset
vdma_rd_read
In
VDMA Read Data Read Enable
vdma_rd_end_burst
In
VDMA Read Data End Burst
vdma_rd_flush
In
VDMA Read Data Flush
vdma_rd_data [DATA_WIDTH-1:0]
Out
VDMA Read Data
vdma_rd_empty
Out
VDMA Read Data Empty
vdma_rd_almost_empty
Out
VDMA Read Data Almost Empty
xsvi_rd_clk_in
In
XSVI Read Data Clock Input
xsvi_rd_vsync_in
xsvi_rd_hsync_in
xsvi_rd_vblank_in
xsvi_rd_hblank_in
xsvi_rd_chroma_in
xsvi_rd_field_in
xsvi_rd_active_video_in
xsvi_rd_clk_out
xsvi_rd_vsync_out
In
XSVI Read Vertical Sync Input
In
XSVI Read Horizontal Sync Input
In
XSVI Read Vertical Blank Input
In
XSVI Read Horizontal Blank Input
In
XSVI Read Chroma Input
In
XSVI Read Field Input
In
XSVI Read Active Video Input
Out _{XSVI Read Data Clock Output}
Out _{XSVI Read Vertical Sync Output}
xsvi_rd_hsync_out
xsvi_rd_vblank_out
Out _{XSVI Read Horizontal Sync Output}
Out _{XSVI Read Vertical Blank Output}
xsvi_rd_hblank_out
xsvi_rd_chroma_out
xsvi_rd_field_out
xsvi_rd_active_video_out
xsvi_rd_data_out [DATA_WIDTH-1:0]
xsvi_wd_clk_in
xsvi_wd_vsync_in
Out _{XSVI Read Horizontal Blank Output}
Out _{XSVI Read Chroma Output}
Out _{XSVI Read Field Output}
Out _{XSVI Read Active Video Output}
Out _{XSVI Read Data Output}
In
XSVI Write Data Clock Input
In
XSVI Write Vertical Sync Input
xsvi_wd_active_video_in
xsvi_wd_data_in [DATA_WIDTH-1:0]
In
XSVI Write Active Video Input
In
XSVI Write Data Input
DS730 September 21, 2010
www.xilinx.com
22
Product Specification