DS730 Datasheet, PDF (3/46 Pages) Xilinx, Inc – LogiCORE IP Video Direct

LogiCORE IP Video Direct Memory Access v1.1
CORE Generator Graphical User Interface (GUI)
The Xilinx Video Direct Memory Access LogiCORE IP is easily configured to meet the developer's specific needs
through the CORE Generator™ graphical user interface (GUI). This section provides a quick reference to
parameters that can be configured at generation time. Figure 1 shows the first page of the GUI.
X-Ref Target - Figure 1
Figure 1: Video DMA Main Screen
The main screen displays a representation of the IP symbol on the left side, and the parameter assignments on the
right side, which are described as follows:
• Component Name: The component name is used as the base name of output files generated for the module.
Names must begin with a letter and must be composed from characters: a to z, 0 to 9 and “_”.
Note: The name “v_vdma_v1_1” is not allowed.
• Interface Selection: The Video DMA is generated with one of two processor interfaces
• EDK pCore Interface: CORE Generator will generate the Video DMA as a pCore which can be easily
imported into an EDK project as a hardware peripheral. The core registers can then be programmed in
real-time via the processor. See the "EDK pCore Interface" section. When the EDK pCore is selected, the
rest of the options are disabled and set to the default value. All modifications to the Video DMA pCore are
made with the EDK GUI.
• General Purpose Processor Interface: CORE Generator will generate a set of ports that can be used to
program the Video DMA. See the "General Processor Interface" section. When the General Purpose
Processor interface is selected, the rest of the configuration options become active and can be used to
generate a customized Video DMA core.
DS730 September 21, 2010
www.xilinx.com
3
Product Specification