DS730 Datasheet, PDF (28/46 Pages) Xilinx, Inc – LogiCORE IP Video Direct

LogiCORE IP Video Direct Memory Access v1.1
Table 9: Control, Interrupt and Status Signals
Name
Direction
ctrl_wd_reset
In
ctrl_rd_reset
In
ctrl_wd_flush
In
ctrl_rd_flush
In
ctrl_wd_fstore_ptr [3:0]
In
ctrl_rd_fstore_ptr [3:0]
In
ctrl_fcount_en
In
ctrl_hw_lockout
In
ctrl_fullduplex_en
In
ctrl_hcrop_en
In
ctrl_sync_en
In
ctrl_circbuff_en
In
ctrl_rd_dma_en
In
ctrl_wd_dma_en
In
ctrl_wd_frame_delay [3:0]
In
ctrl_rd_frame_delay [3:0]
In
ctrl_wd_src_ptr_num [3:0]
In
ctrl_rd_src_ptr_num [3:0]
In
ctrl_wd_frame_preload [7:0]
In
ctrl_rd_frame_preload [7:0]
In
ctrl_wd_delay_preload [7:0]
In
ctrl_rd_delay_preload [7:0]
In
ctrl_wd_v_size [11:0]
In
ctrl_wd_hsize [11:0]
In
ctrl_wd_stride [11:0]
In
ctrl_rd_v_size [11:0]
In
ctrl_rd_hsize [11:0]
In
ctrl_rd_stride [11:0]
In
ctrl_wd_start_addr
[32*”Frame Stores” -1 : 0]
In
ctrl_rd_start_addr
[32*”Frame Stores” -1 : 0]
In
intr_wd_frame_count
Out
intr_wd_delay_count
Out
intr_wd_frame_repeat
Out
intr_wd_frame_skip
Out
Description
SW Write DMA Reset
SW Read DMA Reset
SW Write FIFO Flush
SW Read FIFO Flush
Write Frame Store Pointer
Read Frame Store Pointer
Frame Count Enable
HW Lockout
Reserved
Horizontal Cropping Enable
Sync_Enable
Circular Buffer Enable
VDMA Read Enable
VDMA Write Enable
Write Frame Delay
Read Frame Delay
Write Pointer Number
Read Pointer Number
Write Frame Count
Read Frame Count
Write Delay Timer Count
Read Delay Timer Count
VDMA Write Vsize
VDMA Write Hsize
VDMA Write Stride
VDMA Read Vsize
VDMA Read Hsize
VDMA Read Stride
Write Start Addresses
Bus width based on the “Frame Stores” parameter.
Valid range = 1 – 16.
Read Start Addresses
Bus width based on the “Frame Stores” parameter.
Valid range = 1 – 16.
Write Frame Count Interrupt
Write Delay Count Interrupt
Write Frame Repeat Interrupt
Write Frame Skip Interrupt
DS730 September 21, 2010
www.xilinx.com
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Product Specification