DS730 Datasheet, PDF (16/46 Pages) Xilinx, Inc – LogiCORE IP Video Direct

LogiCORE IP Video Direct Memory Access v1.1
Table 1: Video DMA pCore Memory Mapped Register Set (Cont’d)
Address (hex)
Register Name
Access Type
Description
Write Busy Error Interrupt
This bit indicates that the Frame
0
Size, Frame Stride or Frame Start
Address registers were written
while the DMA was busy. Write 1 to
clear.
BASEADDR + IER – Interrupt Enable
0x0228
R/W
Interrupt Enable Mask
For each bit:
0 = Mask Interrupt
1 = Enable Interrupt
17:31 Reserved
16
Write Frame Count Interrupt En
15
Write Delay Count Interrupt En
14
Write Frame Repeat En
13
Write Frame Skip En
12
Write DMA Done En
9:11 Reserved
8
Read Frame Count Interrupt En
7
Read Delay Count Interrupt En
6
Read Frame Repeat En
5
Read Frame Skip En
4
Read DMA Done En
2:3
Reserved
1
Address Error En
0
Write Busy Error En
DS730 September 21, 2010
www.xilinx.com
16
Product Specification