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UG534 Datasheet, PDF (72/96 Pages) –
Chapter 1: ML605 Evaluation Board
System Monitor Header (J35)
Figure 1-30 shows the pinout for the System Monitor 12-pin header. The header provides
user access to the analog power supply (AVdd) and the 1.25V reference shown in
Figure 1-29, page 71. Access to the FPGA thermal diode and dedicated analog input
channel (Vp/Vn) is also provided on this header. The header can be used to connect user
specific analog signals and sensors to the system monitor.
The kelvin points for a 5 mΩ current sensing shunt in the FPGA 1V Vccint core supply are
also available on this header. By connecting header pins 9 to 11 and 10 to 12 using jumpers,
the system monitor can be used to monitor the FPGA core current and power
consumption. This can be used to collect useful power information about a particular
design or implementation.
X-Ref Target - Figure 1-30
System Monitor
Header J35
NC 1
2
NC 3
4
5
6
1.25V Reference 7
8
Anti-alias Filter
9
10
Vccint_shunt_N 11
12
FPGA
Thermal Diode
access
FPGA_DX_P
FPGA_DX_N
SYSMON_AVDD
Vccint_shunt_P
SYSMON_VN
SYSMON_VP
C169
X7R
16V
0.01UF
AGND
Dedicated Analog Inputs
To Measure VCCINT Current:
Jumper on 9-11, 10-12
Connect Vccint shunt to Vp,Vn
UG534_37 _081209
Figure 1-30: System Monitor Header (J35)
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ML605 Hardware User Guide
UG534 (v1.8) October 2, 2012