UG534 Datasheet, PDF (32/96 Pages) –

Chapter 1: ML605 Evaluation Board
GTX SMA Clock
The ML605 includes a pair of SMA connectors for a GTX (MGT) Clock as described in
Figure 1-9 and Table 1-7.
X-Ref Target - Figure 1-9
SMA_REFCLK_N
SMA_REFCLK_P
J30 32K10K-400E3
GND1 ²
GND2 ³
SMA_REFCLK_C_N1
GND3
SIG GND4
4
5
GND5 ⁶
GND6 ⁷
GND7 ⁸
SMA_REFCLK_C_P1
J31 32K10K-400E3
2
GND1 ₃
GND2 ₄
GND3
SIG _GND4
5
GND5 ⁶
GND6 ⁷
GND7 ⁸
Figure 1-9: GTX SMA Clock
Table 1-7: ML605 Clock Connections
U1 FPGA Pin Schematic Net Name
H9
SYSCLK_N
J9
SYSCLK_P
U23
USER_CLOCK
F5
SMA_REFCLK_N
F6
SMA_REFCLK_P
M22
USER_SMA_CLOCK_N
L23
USER_SMA_CLOCK_P
SMA Pin
U11.5
U11.4
X5.5
J30.1
J31.1
J55.1
J58.1
UG534_09_081309
32
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ML605 Hardware User Guide
UG534 (v1.8) October 2, 2012