UG534 Datasheet, PDF (52/96 Pages) –

Chapter 1: ML605 Evaluation Board
X-Ref Target - Figure 1-20
Table 1-22: User Pushbutton Switch Connections
U1 FPGA Pin
Schematic Net Name
Pushbutton
Switch Pin
A19
GPIO_SW_N
SW5.2
A18
GPIO_SW_S
SW6.2
G17
GPIO_SW_E
SW7.2
H17
GPIO_SW_W
SW8.2
G26
GPIO_SW_C
SW9.2
H10
CPU_RESET
SW10.2
User DIP Switch
The ML605 includes an active-High eight pole DIP switch as described in Figure 1-20 and
Table 1-23.
GPIO DIP SW1
GPIO DIP SW2
GPIO DIP SW3
GPIO DIP SW4
GPIO DIP SW5
GPIO DIP SW6
GPIO DIP SW7
GPIO DIP SW8
SW1
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
SDMX-8-X
VCC1V5
UG534_20_072109
Figure 1-20: User 8-pole DIP Switch
Table 1-23: User DIP Switch Connections
U1 FPGA Pin
Schematic Net Name
D22
GPIO_DIP_SW1
C22
GPIO_DIP_SW2
L21
GPIO_DIP_SW3
L20
GPIO_DIP_SW4
C18
GPIO_DIP_SW5
B18
GPIO_DIP_SW6
K22
GPIO_DIP_SW7
K21
GPIO_DIP_SW8
DIP Switch Pin
SW1.1
SW1.2
SW1.3
SW1.4
SW1.5
SW1.6
SW1.7
SW1.8
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ML605 Hardware User Guide
UG534 (v1.8) October 2, 2012