DS501 Datasheet, PDF (2/25 Pages) Xilinx, Inc – HARD Tri-Mode Ethernet MAC

HARD Tri-Mode Ethernet MAC (TEMAC) (v3.00b)
Features
• Filtering of “bad” receive frames to reduce processor bus utilization.
• Hardware selectable DCR or PLB host interface to configuration registers.
• GMII and MII interfaces to external PHY devices.
• SGMII supported through MGT interface to external copper PHY layer.
• Complies with IEEE 802.3-2000 specification.
• Full duplex operation.
• Media Independent Interface Management (MIIM) for access to PHY transceiver registers.
• Auto pad and Frame Check Sequence (FCS) field insertion or pass through on transmit.
• Auto pad and FCS field stripping or pass through on receive.
• Processes transmission and reception of Pause packets for flow control.
• Supports receive and transmit of longer VLAN type frames compliant to IEEE 802.3-2000.
• Programmable interframe gap.
• Optional support of jumbo frames.
Functional Description
The HARD Tri-Mode Ethernet MAC (TEMAC) core is described in the sections and figures detailed
below.
PLB Tri-mode EMAC System Overview
A PLB Tri-mode Ethernet System includes either one or two PLB_TEMAC soft cores for each
HARD_TEMAC soft core that will be used.
HARD_TEMAC Silicon Component
The Hard TEMAC is a silicon component of each Virtex-4 FX FPGA. The HARD_TEMAC soft core
(wrapper) enables the use of the Hard TEMAC silicon component in EDK embedded systems. Each
Hard TEMAC silicon component consists of two independent Ethernet Medium Access Controllers
(EMAC) capable of 10, 100, or 1000 Mb/s communications and complies with IEEE 802.3-2002
specifications.
These EMACs may be configured for full or half duplex operation and support several media interfaces
including MII, GMII, RGMII, SGMII, and 1000Base-X. The Hard TEMAC also supports MII
management of physical devices, PHY, VLAN frames⁽¹⁾, jumbo frames, configurable inter-frame gaps,
in-band frame check sequences, FCS, for both transmit and receive, auto padding on transmit, FCS
stripping on receive, flow control through Pause packets, receive address filtering, and provides raw
statistics vector outputs. Note that some features supported by the Hard TEMAC silicon component
are not supported by the soft PLB_TEMAC/HARD_TEMAC cores implementation. Please refer to the
"Features" list of this document.
1. IEEE Std. 802.3 uses the terms Frame and Packet interchangeably when referring to the Ethernet unit of transmission.
2
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DS501 April 24, 2009
Product Specification