DS790 Datasheet, PDF (16/25 Pages) Xilinx, Inc – LogiCORE IP AXI SYSMON ADC

LogiCORE IP AXI SYSMON ADC (v2.00a)
enabled independently (via the IP interrupt enable register (IPIER)). All the interrupt signals are rising edge sensi-
tive.
Interrupt registers are strictly 32-bit accessible. If byte/half-word or without byte-enables type of access is made,
the core behavior is not guaranteed.
The interrupt registers are in the Interrupt Controller Module. The AXI Sysmon ADC core permits multiple condi-
tions for an interrupt or an interrupt strobe which occurs only after the completion of a transfer.
Global Interrupt Enable Register (GIER)
The Global Interrupt Enable Register (GIER) is used to enable globally the final interrupt output from the Interrupt
Controller as shown in Figure 8 and described in Table 10. This bit is a read or write bit and is cleared upon reset.
X-Ref Target - Figure 8
GIER
Undefined
31 30
Figure 8: Global Interrupt Enable Register (GIER)
0
DS790_08
Table 10: Global Interrupt Enable Register (GIER) Description (C_BASEADDR + 0x5C)
Bit(s)
31
30 - 0
Name Access
GIER
R/W
Undefined N/A
Reset
Value
’0’
N/A
Description
Global Interrupt Enable Register: It enables all individually enabled interrupts to
be passed to the interrupt controller.
’0’ = Disabled
’1’ = Enabled
Undefined.
IP Interrupt Status Register (IPISR)
Six unique interrupt conditions are possible in the AXI Sysmon ADC core.
The Interrupt Controller has a register that enables each interrupt independently. The bit assignment in the inter-
rupt register for a 32-bit data bus is shown in Figure 9 and described in Table 11. The interrupt register is a read/tog-
gle on write register. Writing a ’1’ to a bit position within the register causes the corresponding bit position in the
register to toggle. All register bits are cleared upon reset.
X-Ref Target - Figure 9
Undefined
JTAG
OT _LOCKED
De-active
EOS ALM[1]
OT
31
10 9 8 7 6 5 4 3 2 1 0
ALM[0]
EOC
ALM[0]
Deactive _JTAG
ALM[2]
MODIFIED
DS790_09
Figure 9: IP Interrupt Status Register (IPISR)
DS790 March 1, 2011
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Product Specification