DS790 Datasheet, PDF (11/25 Pages) Xilinx, Inc – LogiCORE IP AXI SYSMON ADC

LogiCORE IP AXI SYSMON ADC (v2.00a)
Table 4: Core Registers (Cont’d)
Base Address + Offset
(hex)
Register Name
C_BASEADDR + 0x28C
Undefined
C_BASEADDR + 0x290
C_BASEADDR + 0x294
C_BASEADDR + 0x298
C_BASEADDR + 0x29C
to 
C_BASEADDR + 0x2F8
Min Temp
Min V_CCINT
Min V_CCAUX
Undefined
Access Type
Default
Value
(hex)
N/A
Undefined
Read⁽⁶⁾
N/A
Read⁽⁶⁾
N/A
Read⁽⁶⁾
N/A
N/A
Undefined
C_BASEADDR + 0x2FC
Flag Register
Read⁽⁶⁾
N/A
C_BASEADDR + 0x300 Configuration Register 0
C_BASEADDR + 0x304 Configuration Register 1
C_BASEADDR + 0x308 Configuration Register 2
C_BASEADDR + 0x30C
to
Test register 0 to 4
C_BASEADDR + 0x31C
C_BASEADDR + 0x320 Sequence Register 0
C_BASEADDR + 0x324
Sequence Register 1
C_BASEADDR + 0x328
Sequence Register 2
C_BASEADDR + 0x32C Sequence Register 3
C_BASEADDR + 0x330
Sequence Register 4
C_BASEADDR + 0x334
Sequence Register 5
C_BASEADDR + 0x338
Sequence Register 6
C_BASEADDR + 0x33C Sequence Register 7
C_BASEADDR + 0x340
Alarm Threshold
Register 0
R/W⁽⁹⁾
R/W⁽⁹⁾
R/W⁽⁹⁾
N/A
0x0
0x0
0x1E00
N/A
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
Description
This location is unused and contains
invalid data.Do not Read or Write to this
register.
The 10-bit MSB justified minimum
temperature measurement.
The 10-bit MSB justified minimum
V_CCINT measurement.
The 10-bit MSB justified minimum
V_CCAUX measurement.
These locations are unused and
contain invalid data. Do not Read or
Write to these registers.
The 16-bit register gives general status
information of ALARM, OT, Disable
information of SYSMON. and
information about whether the
SYSMON is using internal reference
voltage or external reference voltage.
SYSMON Configuration register 0.
SYSMON Configuration register 1.
SYSMON Configuration register 2.
SYSMON Test register 0 to 4
(for factory test only)
SYSMON Sequence register 0 (ADC
channel selection).
SYSMON Sequence register 1 (ADC
channel selection).
SYSMON Sequence register 2 (ADC
channel averaging enable).
SYSMON Sequence register 3 (ADC
channel averaging enable).
SYSMON Sequence register 4 (ADC
channel analog-input mode).
SYSMON Sequence register 5 (ADC
channel analog-input mode).
SYSMON Sequence register 6 (ADC
channel acquisition time).
SYSMON Sequence register 7 (ADC
channel acquisition time).
The 10-bit MSB justified alarm
threshold register 0 (Temperature
Upper).
DS790 March 1, 2011
www.xilinx.com
11
Product Specification