DS790 Datasheet, PDF (1/25 Pages) Xilinx, Inc – LogiCORE IP AXI SYSMON ADC

DS790 March 1, 2011
LogiCORE IP AXI SYSMON ADC
(v2.00a)
Product Specification
Introduction
The LogiCORE™ IP AXI SYSMON ADC core is a 32-bit
slave peripheral that connects to the AXI (Advanced
eXtensible Interface) and provides the controller inter-
face for the System Monitor (SYSMON) hard macro on
Virtex^®-6 family of FPGAs. This document describes
the specifications for the AXI SYSMON ADC core. It is
assumed that user is familiar with SYSMON hard
macro. For information on SYSMON hard macro, see
UG370, Virtex-6 FPGA System Monitor User Guide, listed
in the Reference Documents section.
Features
• AXI4-Lite interface is based on the AXI4
specification
• Connects as a 32-bit AXI4-Lite slave
• Uses dedicated System Monitor (SYSMON) hard
macro on Virtex-6 devices
• Supports 10-bit, 200-kSPS (kilo-Samples Per
Second) Analog-to-Digital Converter (ADC)
• Supports on-chip monitoring of supply voltages
and temperature
• Supports one dedicated, high-bandwidth
differential analog-input pair and 16 auxiliary
low-bandwidth differential analog-input pairs
• Supports automatic alarms based on user-defined
limits
• Supports optional interrupt request generation
LogiCORE IP Facts Table
Core Specifics
Supported Device
Family ⁽¹⁾
Virtex-6⁽²⁾
Supported User
Interfaces
AXI4-Lite
Resources
Frequency
LUTs
FFs
DSP
Slices
Block
RAMs
Max.
Freq.
See Table 13.
Provided with Core
Documentation
Product Specification
Design Files
VHDL
Example Design
Not Provided
Test Bench
Not Provided
Tested Design Tools
Design Entry Tools
XPS 13.1
Simulation
Mentor Graphics ModelSim 6.6d
Synthesis Tools
XST 13.1
Support
Provided by Xilinx, Inc.
Notes:
1. For a list of supported devices, see the release notes for this
core.
2. For more information, see DS150, Virtex-6 Family Overview.
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DS790 March 1, 2011
www.xilinx.com
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Product Specification