W83877TF Datasheet, PDF (99/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.2.5 Configuration Register 4 (CR4), default = 00H
When the device is in Extended Function mode and EFIR is 04H, the CR4 register can be accessed
through EFDR. The bit definitions are as follows:
7 6 5 4 32 1 0
URBTRI
URATRI
reserved
PRTTRI
URBPWD
URAPWD
reserved
PRTPWD
PRTPWD (Bit 7):
0
Supplies power to the parallel port (default)
1
Puts the parallel port in power-down mode
Bit 6: Reserved.
URAPWD (Bit 5):
0
Supplies power to COMA (default)
1
Puts COMA in power-down mode
URBPWD (Bit 4):
0
Supplies power to COMB (default)
1
Puts COMB in power-down mode
PRTTRI (Bit 3):
This bit enables or disables the tri-state outputs of parallel port in power-down mode.
0
The output pins of the parallel port will not be tri-stated when parallel port is in power-
down mode. (default)
1
The output pins of the parallel port will be tri-stated when parallel port is in power-
down mode.
Bit 2: Reserved.
URATRI (Bit 1):
This bit enables or disables the tri-state outputs of UARTA in power-down mode.
0
The output pins of UARTA will not be tri-stated when UARTA is in power-down mode.
1
The output pins of UARTA will be tri-stated when UARTA is in power-down mode.
URBTRI (Bit 0):
This bit enables or disables the tri-state outputs of UARTB in power-down mode.
0
The output pins of UARTB will not be tri-stated when UARTB is in power-down mode.
1
The output pins of UARTB will be tri-stated when UARTB is in power-down mode.
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Publication Release Date: March 1998
Version 0.61