W83877TF Datasheet, PDF (136/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.2.49 Configuration Register 42 (CR42), default=N/A
When the device is in Extended Function mode and EFIR is 42H, the CR42 register can be accessed
through EFDR. The bit definitions are as follows:
765
43
21
0
URBIRQSTS
URAIRQSTS
FDCIRQSTS
PRTIRQSTS
reserved
reserved
reserved
reserved
Bit 7 - bit 4 : Reserved, fixed at 0.
Bit 3 - bit 0 : Device's IRQ status .
These bits indicate the IRQ pin status of the individual device respectively. The device's IRQ status
bit is set or cleared at their source device, writing a 1 or 0 has no effect.
PRTIRQSTS (Bit 3) : printer port IRQ status. While the IRQ type of printer port is edge trigger-type,
this bit will set and reset immediately. As the software reads this bit, it indicates low level. The
software must read the IRQ status bit in the printer port device register to correctly identify whether
the printer port IRQ occurs.
FDCIRQSTS (Bit 2) : FDC IRQ status.
URAIRQSTS (Bit 1) : UART A IRQ status.
URBIRQSTS (Bit 0) : UART B IRQ status.
8.2.50 Configuration Register 43 (CR43), default=00H
When the device is in Extended Function mode and EFIR is 43H, the CR43 register can be accessed
through EFDR. This register is reserved.
8.2.51 Configuration Register 44 (CR44), default=00H
When the device is in Extended Function mode and EFIR is 44H, the CR44 register can be accessed
through EFDR. This register is reserved.
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Publication Release Date: March 1998
Version 0.61