W83877TF Datasheet, PDF (133/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.2.45 Configuration Register 3A (CR3A), default=00H
When the device is in Extended Function mode and EFIR is 3AH, the CR3A register can be accessed
through EFDR. The bit definitions are as follows:
765
43
21
0
Bit 7 - bit 6 : Reserved, fixed at 0.
UPULLEN
SMI_EN
reserved
reserved
reserved
TMIN_SEL
reserved
reserved
TMIN_SEL (Bit 5): Time resolution of the auto power machines of all devices.
CR35 to CR39 store the initial counts of the devices.
0
one second
1
one minute
Bit 4 - bit 2: Reserved, fixed at 0.
SMI_EN (Bit 1): SMI output pin enable.
While an SMI event is raised on the output of the SMI logic, this bit determines whether the SMI
interrupt will be generated on the SMI output SMI pin and on the Serial IRQ IRQSER pin while in
Serial IRQ mode.
0
disable
1
enable
UPULLEN (Bit 0): Enable the pull up of IRQSER pin in Serial IRQ mode.
0
disable the pull up of IRQSER pin.
1
enable the pull up of IRQSER pin.
8.2.46 Configuration Register 3B (CR3B), default=00H
Reserved for testing. Should be kept all 0's.
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Publication Release Date: March 1998
Version 0.61