W83877TF Datasheet, PDF (134/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.2.47 Configuration Register 40 (CR40), default=00H
When the device is in Extended Function mode and EFIR is 40H, the CR40 register can be accessed
through EFDR. The bit definitions are as follows:
765
43
21
0
URBIDLSTS
URAIDLSTS
FDCIDLSTS
PRTIDLSTS
reserved
reserved
reserved
reserved
Bit 7 - bit 4 : Reserved, fixed at 0.
Bit 3 - bit 0 : Devices' idle status.
These bits indicate that the individual device's idle timer expires due to no I/O access, IRQ, and
external input to the device respectively. These 4 bits are controlled by the printer port, FDC, UART
A, and UART B power down machines individually. The bits are set/cleared by W83877TF
automatically. Writing a 1 can also clear this bit, and writing a 0 has no effect.
PRTIDLSTS (Bit 3): printer port idle status.
0
printer port is now in the working state.
1
printer port is now in the sleeping state due to no printer port access, IRQ, DMA
acknowledge, and no transition on BUSY, ACK , PE, SLCT, and ERR pins.
FDCIDLSTS (Bit 2): FDC idle status.
0
FDC is now in the working state.
1
FDC is now in the sleeping state due to no FDC access, no IRQ, no DMA
acknowledge, and no enabling of the motor enable bits in the DOR register.
URAIDLSTS (Bit 1): UART A idle status.
0
UART A is now in the working state.
1
UART A is now in the sleeping state due to no UART A access, no IRQ, the
receiver is now waiting for a start bit, the transmitter shift register is now empty,
and no transition on MODEM control input lines.
URBIDLSTS (Bit 0): UART B idle status.
0
UART B is now in the working state.
1
UART B is now in the sleeping state due to no UART B access, no IRQ, the
receiver is now waiting for a start bit, the transmitter shift register is now empty,
and no transition on MODEM control input lines.
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Publication Release Date: March 1998
Version 0.61