W83877TF Datasheet, PDF (148/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
Bit
Name
0-7 TMR_VAL
Description
This read-only field returns the running count of the power management timer.
This is a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts
while in the system working state. The timer is reset and then continues
counting until the CLKIN input the the chip is stopped. If the clock is restarted
without a MR reset, then the counter will continue counting from where it
stopped. The TMR_STS bit is set any time the last bit of the timer (bit 23)
goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of the
TMR_STS bit will generate an SCI interrupt.
8.4.11 Power Management 1 Timer 3 (PM1TMR3)
Register Location:
<CR33>+AH System I/O Space
Default Value:
00h
Attribute:
Read only
Size:
8 bits
765
43
21
0
TMR_VAL16
TMR_VAL17
TMR_VAL18
TMR_VAL19
TMR_VAL20
TMR_VAL21
TMR_VAL22
TMR_VAL23
Bit
Name
0-7 TMR_VAL
Description
This read-only field returns the running count of the power management timer.
This is a 24-bit counter that runs off of a 3.579545 MHZ clock, and counts
while in the system working state. The timer is reset and then continues
counting until the CLKIN input the the chip is stopped. If the clock is restarted
without a MR reset, then the counter will continue counting from where it
stopped. The TMR_STS bit is set any time the last bit of the timer (bit 23)
goes from 0 to 1 or from 1 to 0. If the TMR_EN bit is set, the setting of the
TMR_STS bit will generate an SCI interrupt.
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Publication Release Date: March 1998
Version 0.61