W83877TF Datasheet, PDF (140/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.3.1 SMI to SCI/SCI to SMI and Bus Master
For the process of generating an interrupt from SMI to SCI or from SCI to SMI, see the following
figure for illustration.
from SMI to SCI
BIOS_RLS
GBL_EN
from SCI to SMI
GBL_RLS
BIOS_EN
Bus Master SCI
BM_CNTPL
BM_RLD
: Status bit
: Enable bit
clear
set
clear
set
clear
set
GBL_STS
To SCI Logic
BIOS_STS
To SMI Logic
BM_STS
To SCI Logic
For the BIOS software to raise an event to the ACPI software, BIOS_RLS, GBL_EN, and GBL_STS
bits are involved. GBL_EN is the enable bit and the GBL_STS is the status bit. Both are controlled by
the ACPI software. If BIOS_RLS is set by the BIOS software and GBL_EN is set by the ACPI
software, an SCI interrupt is raised. Writing a 1 to BIOS_RLS sets it to logic 1 and also sets
GBL_STS to logic 1; Writing a 0 to BIOS_RLS has no effect. Writing a 1 to GBL_STS clears it to
logic 0 and also clears BIOS_RLS to logic 0; writing a 0 to GBL_STS has no effect.
For the ACPI software to raise an event to the BIOS software, GBL_RLS, BIOS_EN, and BIOS_STS
bits are involved. BIOS_EN is the enable bit and the BIOS_STS is the status bit. Both are controlled
by the BIOS software. If GBL_RLS is set by the ACPI software and BIOS_EN is set by the BIOS
software, an SMI is raised. Writing a 1 to GBL_RLS sets it to logic 1 and also sets BIOS_STS to
logic 1; Writing a 0 to GBL_RLS has no effect. Writing a 1 to BIOS_STS clears it to logic 0 and also
clears GBL_RLS to logic 0; writing a 0 to BIOS_STS has no effect.
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Publication Release Date: March 1998
Version 0.61