W83877TF Datasheet, PDF (154/154 Pages) Winbond – I/O chip disk drive adapter

W83877TF
8.4.21 Bit Map Configuration Registers
Table 8-4: Bit Map of PM1 Register Block
Register
PM1STS1
PM1STS2
PM1EN1
PM1EN2
PM1CTL1
PM1CTL2
PM1CTL3
PM1CTL4
PM1TMR1
PM1TMR2
PM1TMR3
PM1TMR4
Address
<CR33>
<CR33>+1H
<CR33>+2H
<CR33>+3H
<CR33>+4H
<CR33>+5H
<CR33>+6H
<CR33>+7H
<CR33>+8H
<CR33>+9H
<CR33>+AH
<CR33>+BH
Power-On
Reset
Value
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
D7
D6
D5
D4
D3
D2
D1
0
WAK_STS
0
0
0
0
0
0
TMR_VAL7
TMR_VAL15
TMR_VAL23
0
0
0
0
0
0
0
0
0
TMR_VAL6
TMR_VAL14
TMR_VAL22
0
GBL_STS
0
GBL_EN
0
0
0
0
0
TMR_VAL5
TMR_VAL13
TMR_VAL21
0
BM_STS
0
0
0
0
0
0
0
TMR_VAL4
TMR_VAL12
TMR_VAL20
0
0
0
0
0
0
0
0
0
TMR_VAL3
TMR_VAL11
TMR_VAL19
0
0
0
0
0
GBL_RLS
0
0
0
TMR_VAL2
TMR_VAL10
TMR_VAL18
0
0
0
0
BM_RLD
0
0
0
TMR_VAL1
TMR_VAL9
TMR_VAL17
0
D0
TMR_STS
0
TMR_EN
0
SCI_EN
0
0
0
TMR_VAL0
TMR_VAL8
TMR_VAL16
0
Table 8-5: Bit Map of GPE Register Block
Register Address Power-On
D7
D6
D5
Reset Value
GP0STS1
<CR34>
0000 0000
0
0
0
GP0STS2 <CR34>+1H 0000 0000
0
0
0
GP0EN1 <CR34>+2H 0000 0000
0
0
0
GP0EN2 <CR34>+3H 0000 0000
0
0
0
GP1STS1 <CR34>+4H 0000 0000
0
0
0
GP1STS2 <CR34>+5H 0000 0000
0
0
0
GP1EN1 <CR34>+6H 0000 0000
0
0
0
GP1EN2 <CR34>+7H 0000 0000
0
0
0
D4
D3
D2
D1
D0
0
PRTSCISTS FDCSCISTS URASCISTS URBSCISTS
0
0
0
0
0
0
PRTSCIEN
FDCSCIEN
URASCIEN
URBSCIEN
0
0
0
0
0
0
0
0
0
BIOS_STS
0
0
0
0
0
0
0
0
TMR_ON
BIOS_EN
0
0
0
BM_CNTRL
BIOS_RLS
- 128 -
Publication Release Date: March 1998
Version 0.61