W958D6DB Datasheet, PDF (45/57 Pages) Winbond – Low-power features

W958D6DB
10.2.10 Burst READ Row Boundary Crossing
VIH
CLK
VIL
VIH
A[max:16]
VIL
VIH
ADV# _VIL
t CLK
LB#/UB# ^VIH
VIL
VIH
CE #
VIL
VIH
OE #
VIL
256Mb Async./Burst/Sync./A/D MUX
VIH
WE #
VIL
VOH
A/DQ [15:0]
VOL
VOH
WAIT
VOL
Valid
output
Valid
output
End of Row
tKHTL
t KOH
Note 2
t KHTL
Valid
output
Valid
output
t KOH
Undefined
Don't Care
Notes: 1.Non-default BCR settings for burst READ at end of row: fixed or variable latency, WAIT active LOW, WAIT asserted
during delay (shown as solid line).
2. WAIT will be asserted for LC cycles for variable latency, or LC cycles for fixed latency.
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Publication Release Date : June 27 ,2013
Revision : A01-003