W958D6DB Datasheet, PDF (20/57 Pages) Winbond – Low-power features

W958D6DB
256Mb Async./Burst/Sync./A/D MUX
8.4.1.4 Register READ Synchronous Mode Followed by READ ARRAY Operation
CLK
A [max:16 ]
(except A) [19 :18 ]
A[19 :18 ]2
CRE
ADV#
CE #
OE #
Latch control register value
tSP
tHD
tSP
tHD
tSP
Latch control register address
Address
Address
tHD
tCSP
t ABA
Note 3
tCBPH
tHZ
WE #
tSP
LB #/UB #
t_BOE
tOLZ
t_HD
tACLK
t KOH
t OHZ
A/DQ[15 :0 ]
Valid CR
Address
Valid
data
WAIT ^High-Z
tKHTL
High- Z
Don’t Care
Undefined
Notes :1.Non-default BCR settings for synchronous mode register READ followed by READ ARRAY operation : Latency code2(3
clocks) : WAIT active LOW;WAIT asserted during delay.
2.A[19:18]=00b to read RCR,10b to read BCR, and 01b to read DIDR.
3.CE# must remain LOW to complete a burst-of-one READ. WAIT must be monitored—additional WAIT cycles caused by
refresh collisions require a corresponding number of additional CE# LOW cycles.
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Publication Release Date : June 27 ,2013
Revision : A01-003