W958D6DB Datasheet, PDF (4/57 Pages) Winbond – Low-power features

W958D6DB
256Mb Async./Burst/Sync./A/D MUX
8.4.3.16 Operating Mode (BCR[15])........................................................................................................................... 29
8.4.4 Refresh Configuration Register ............................................................................................................... 29
8.4.4.1 Refresh Configuration Register Mapping ....................................................................................................... 30
8.4.4.2 Partial Array Refresh (RCR[2:0]) Default = Full Array Refresh ....................................................................... 30
8.4.4.3 Address Patterns for PAR (RCR [4] = 1)......................................................................................................... 31
8.4.4.4 Deep Power-Down (RCR[4]) Default = DPD Disabled ................................................................................... 31
8.4.5 Device Identification Register .................................................................................................................. 31
8.4.5.1 Device Identification Register Mapping .......................................................................................................... 31
8.4.5.2 Virtual Chip Enable Function: ......................................................................................................................... 31
9. ELECTRICAL CHARACTERISTIC ........................................................................................... 32
9.1 Absolute Maximum DC, AC Ratings ................................................................................................. 32
9.2 Electrical Characteristics and Operating Conditions......................................................................... 32
9.3 Partial Array Self Refresh Standby Current ...................................................................................... 33
9.4 Capacitance ...................................................................................................................................... 33
9.5 AC Input-Output Reference Wave form ............................................................................................ 33
9.6 AC Output Load Circuit ..................................................................................................................... 33
10. TIMING REQUIRMENTS ......................................................................................................... 34
10.1 Read, Write Timing Requirements.................................................................................................. 34
10.1.1 Asynchronous READ Cycle Timing Requirements ............................................................................... 34
10.1.2 Burst READ Cycle Timing Requirements .............................................................................................. 35
10.1.3 Asynchronous WRITE Cycle Timing Requirements .............................................................................. 36
10.1.4 Burst WRITE Cycle Timing Requirements ............................................................................................ 37
10.2 TIMING DIAGRAMS ....................................................................................................................... 38
10.2.1 Initialization Period................................................................................................................................. 38
10.2.2 DPD Entry and Exit Timing Parameters ................................................................................................ 38
10.2.3 Initialization and DPD Timing Parameters............................................................................................. 38
10.2.4 Asynchronous READ ............................................................................................................................. 39
10.2.5 Single Access Burst READ Operation - Variable Latency..................................................................... 40
10.2.6 Four Word Burst READ Operation-Variable Latency ............................................................................ 41
10.2.7 Single-Access Burst READ Operation-Fixed Latency........................................................................... 42
10.2.8 Four Word Burst READ Operation-Fixed Latency................................................................................. 43
10.2.9 Burst READ Terminate at End-of-Row (Wrap Off) ................................................................................ 44
10.2.10 Burst READ Row Boundary Crossing ................................................................................................. 45
10.2.11 Asynchronous WRITE ......................................................................................................................... 46
10.2.12 Burst WRITE Operation—Variable Latency Mode .............................................................................. 47
10.2.13 Burst WRITE Operation-Fixed Latency Mode ..................................................................................... 48
10.2.14 Burst WRITE Terminate at End of Row (Wrap Off) ............................................................................. 49
10.2.15 Burst WRITE Row Boundary Crossing................................................................................................ 50
10.2.16 Burst WRITE Followed by Burst READ ............................................................................................... 51
10.2.17 Asynchronous WRITE Followed by Burst READ ................................................................................ 52
10.2.18 Burst READ Followed by Asynchronous WRITE ................................................................................ 53
10.2.19 Asynchronous WRITE Followed by Asynchronous READ .................................................................. 54
11. PACKAGE DESCRIPTION...................................................................................................... 55
11.1 Package Dimension ........................................................................................................................ 55
12. REVISION HISTORY ............................................................................................................... 56
Publication Release Date : June 27 ,2013
-4-
Revision : A01-003