TA1360AFG_05 Datasheet, PDF (98/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1360AFG
Note Characteristics
HA05 HD input threshold
amplitude
Test Conditions
1. Set subaddress (00) data to 40H.
2. Input signal B (as shown in the figure below) to TP50.
3. Increase signal B amplitude from 0 Vp-p. When #37 (H-OUT) phase locks with that of signal B,
measure signal B amplitude V_thHD.
31.75 µs
Signal B
2.35 µs
V_thDH
HA06 Horizontal picture
phase adjustment
variable range
1. Set subaddress (00) data to 40H.
2. Input signal B (the figure is shown below) to TP50.
3. Change subaddress (01) data from 80H to 00H, and measure phase change amount ∆H_SFT−
of #39 (H-OUT) waveform.
4. Change slave address (01) data from 80H to FEH, and measure phase change amount
∆H_SFT+ of #39 (H-OUT) waveform.
31.75 µs
Signal B
#39 waveform
Data: 00H
#39 waveform
Data: 80H
#39 waveform
Data: FEH
2.35 µs
1.5 V
∆H_SFT−
∆H_SFT+
98
2005-08-18