TA1360AFG_05 Datasheet, PDF (102/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1360AFG
Note Characteristics
Test Conditions
V01 VP output pulse
width, Vertical
free-run (maximum
pull-in range)
1. Input signal D (shown in the figure below) to TP50, and signal E (shown in the figure below) to
#39 (FBP input).
2. Measure VP output pulse width (VPw) according to TP35 output waveform.
3. Measure VP pull-in range (VPt0) according to TP35 output waveform.
4. Set subaddress (03) data to 01H, 02H, 03H, 04H, 05H, and 06H. Measure pull-in range VPt1,
VPt2, VPt3, VPt4, VPt5, and VPt6 as in the step 3 above.
Signal D
(TP50 input signal)
2.35 µs
29.63 µs
4V
Signal E
(#39 input waveform)
5.6 µs
9V
GND
#39
input waveform
TP35 waveform
VPw
VPt
V02 Vertical minimum
pull-in range
1. Repeat the step 1 of Note #V01.
2. Input signal F (shown in the figure below) to TP52.
3. Increase signal-F cycle from 30 H. Measure the cycle (T_VPULL) when phase locks with that of
TP35.
Signal F (TP 52
waveform input)
3H
#39
input waveform
TP 35 waveform
T_VPULL
102
2005-08-18