TA1360AFG_05 Datasheet, PDF (82/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

TA1360AFG
Note
No.
Characteristics
Test Conditions
SW Mode
SW68 SW67 SW66 SW26 SW25 SW24 SW21 SW19 SW18
Test Method
T12 ACL
A
B
B
A
A
A
A
A
A 1. Input signal 1 (f₀ = 100 kHz, picture period amplitude 0.2 Vp-p) from pin 68.
characteristic
2. Measure pin 12 picture period amplitude, vACL1.
3. Apply “DC voltage of pin 78 − 0.8 V” to pin 78 from external power supply and measure pin
12-picture period amplitude, vACL2.
4. Apply “DC voltage of pin 78 − 1.3 V” to pin 78 from external power supply and measure pin
12-picture period amplitude, vACL3.
5. Calculate the following equations.
ACL₁ = −20 × log (vACL2/vACL1)
ACL₂ = −20 × log (vACL3/vACL1)
T13 ABL point
C
B
B
A
A
A
A
A
A 1. Measure DC voltage of pin 78, VABL1.
2. Set subaddress (1B) data to (1C).
3. Apply external voltage to pin 78, and decrease voltage from 6.5 V. When voltage of pin 12
starts changing, measure pin 78 voltage, VABL2.
4. Change subaddress (1B) data to (3C), (5C), (7C), (9C), (BC), (DC), and (FC) under the
status of the step 3 above. Measure pin 78 voltage: VABL3, VABL4, VABL5, VABL6, VABL7,
VABL8, and VABL9.
5. ABL_P1 = VABL2 − VABL1 ABL_P5 = VABL6 − VABL1
ABL_P2 = VABL3 − VABL1 ABL_P6 = VABL7 − VABL1
ABL_P3 = VABL4 − VABL1 ABL_P7 = VABL8 − VABL1
ABL_P4 = VABL5 − VABL1 ABL_P8 = VABL9 − VABL1
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2005-08-18