TA1360AFG_05 Datasheet, PDF (66/110 Pages) Toshiba Semiconductor – YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV

Note No.
Characteristics
P26 Y delay time switching
TA1360AFG
SW71
B
Test Conditions
SW Mode
SW70 SW68 SW64
B
A
B
SW74
Test Method (Test condition: V_CC = 9 V/2 V, Ta = 25 ± 3°C)
ON 1. Set unicolor to maximum (1111111), SRT-GAIN to minimum (00000), and input 2T pulse signal
(approximately 0.7 V (p-p)) to TPA.
2. Set picture sharpness to center (1000000).
3. Monitor #68 and #12 as shown in the figure below. Measure YDL00 that is the time difference between
signals #68 and #12.
4. Set Y/C-DL1 to +5 ns (1), and
measure YDL01 as shown in the
figure below.
5. Set Y/C-DL1 to 0 ns (0),
Y/C-DL2 to +10 ns (1) and
measure YDL10 as shown in the
figure below.
2T pulse
Approximately
0.7 Vp-p
6. Set Y/C-DL1 to +5 ns (1),
Y/C-DL2 to +10 ns (1) and
measure YDL11 as shown in the
figure below.
7. Determine YDLA, YDLB, and
YDLC using the following
equations.
#12
#68
50%
YDLA = YDL01 − YDL00
YDLB = YDL10 − YDL00
50%
YDLC = YDL11 − YDL00
YDL00
YDL01
YDL10
YDL11
66
2005-08-18